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Management Planning Dept.

CX Team


• Establishment and management of corporate CI, BI, PI identity
• Strengthening university/internal relationships and conducting promotional marketing
• Development of IR strategy / management of shareholder/investor relationships and corporate information dissemination
• Provision of corporate training services and learning support
• Defining organizational values and behavior patterns, and establishing corporate culture

Strategic Planning Team

Establishing business plans and mid-to-long-term management strategies
Managing funds and budgets
Corporate disclosure and board of directors operations
Reviewing new business opportunities

Financial Management Team

Managing performance indicators (sales/profit and loss)
Corporate settlement and external audit inspection
Tax management including corporate tax and value-added tax (VAT)

HR Infra Operations Team 

HR operations & administrative support
Administration of employee welfare programs
Human resources planning, evaluation, compensation, recruitment, and training
Management of office environment and general administrative tasks
Management of enterprise systems in addition to server computing
Sales Dept.

Sales 1 Team


  • ASIC, SoC, Turnkey, IP sales
  • Identification and support of domestic AI, consumer, and automotive markets
  • Support for major domestic companies such as Samsung and LG Electronics
  • Development of sales strategies for the current year and mid- to long-term

Sales 2 Team

  • ASIC, SoC, Turnkey, IP sales
  • Identification and support of domestic AI, memory, network, and IoT product customers
  • Support for domestic company SKhynix
  • Development of sales strategies for the current year and mid- to long-term


Sales Management Team

  • Product costing
  • Purchase and sales management
  • Contract management

SCM Team

  • Management of TSMC and OSAT outsourcing, production, delivery, inventory, and import/export customs clearance
  • Identification of outsourcing partners and negotiation of prices
  • Development and management of production schedules

IP Team

  • Planning for the purchase of semiconductor design assets (IP) and semiconductor design automation tools (EDA)
  • Supervision of development and purchase of IP and EDA requested by clients, and establishment of contracts and purchasing strategies
  • Discovery, evaluation, and development strategies for domestic and overseas IP and EDA suppliers
  • Development of IP price negotiation strategy and management of purchasing process (order, delivery, payment, cost analysis)
Global Strategy Dept.

Global Business Team 


  • Analysis of global semiconductor technology trends
  • Research on overseas markets and corporate trends
  • Development of overseas marketing strategy, IR implementation, and performance management
  • Establishment and operational management of overseas forward bases

SoC Dept.


APM Team


  • Architecture & Project manage
    - Chip architecture design 

    - Project schedule management 
    - Project resource management 
    - Project development method management

SD Team


  • System Design
    - Chip top design 

    - CPU subsystem design 
    - Off chip memory design (DDR/LPDDR/GDDR/HBM etc) 
    - Bus fabric design
  • BSP (Board Support Package)
    - Board level software development (Linux porting & device driver)
  • HW
    Hardware board design (EVB, Test board, etc) 
  • Inhouse tools development
    - AWorld Magic™ 

HSI Team


  • High Speed Interface design
    - MIPI CSI/DSI 

    - PCIe gen3/4/5/6 
    - Gmac transceiver

DV Team


  • Design Verification
    - UVM based IP verification 

    - UVM based application performance verification 
    - UVM based rtl/pre/post env verification

DI 1 Dept.

PID 1 Team


  • Provide design service to connect customers (fabeless company) and foundry (TSMC) 
  • Provides design service to meet customer needs
    - Pursue optimization for the best PPA 
  • Provides Physical Implementation & Physical Design service
    - Use EDA tools such as Synopsys, Cadence and Mentor, etc 

    - Logic Synthesis / Topographic Synthesis 
    - Static Timing Analysis 
    - Low Power Analysis 
    - Equivalence Check

PID 2 Team 

  • Provide design service to connect customers (fabeless company) and foundry (TSMC) 
  • Provides design service to meet customer needs
    - Pursue optimization for the best PPA 
  • Provides Physical Implementation & Physical Design service
     - use EDA tools such as Synopsys, Cadence and Mentor, etc 

    - Physical Design Implementation 
    - Physical Design Verification 
    - DRC/LVS/ESD/DFM 
    - EMIR, DVD

PID 3 Team 

  • Provide design service to connect customers (fabeless company) and foundry (TSMC) 
  • Provides design service to meet customer needs
    - Pursue optimization for the best PPA
  • Provides Physical Implementation & Physical Design service
  • Custom Layout for Mixed IP
    - P&R, DRC, LVS, Antenna, Latch-up, ESD, EM rule check. 

    - SoC Mixed-IP DK Layout and Verification

DI 2 Dept.


PI Team


  • Provide design service to connect customers (fabeless company) and foundry (TSMC) 
  • Provides design service to meet customer needs
    - Pursue optimization for the best PPA
  • Provides Physical Implementation & Physical Design service
    - Use EDA tools such as Synopsys, Cadence and Mentor, etc 
    - Logic Synthesis / Topographic Synthesis 
    - Static Timing Analysis 
    - Low Power Analysis 
    - Equivalence Check

PD team

  • Provide design service to connect customers (fabeless company) and foundry (TSMC) 
  • Provides design service to meet customer needs
    - Pursue optimization for the best PPA
  • Provides Physical Implementation & Physical Design service
    - Use EDA tools such as Synopsys, Cadence and Mentor, etc 

    - Physical Design Implementation 
    - Physical Design Verification 
    - DRC/LVS/ESD/DFM 
    - EMIR, DVD   

DS Team

  • Provide design service to connect customers (fabeless company) and foundry (TSMC)
  • Provides design service to meet customer needs
    - Pursue optimization for the best PPA
  • Provides Physical Implementation & Physical Design service
  • Custom Layout for Mixed IP
    - P&R, DRC, LVS, Antenna, Latch-up, ESD, EM rule check

    - SoC Mixed-IP DK Layout and Verification

DI 3 Dept.


ETS Team 


  • Process DK/PDK/IP Support & Management
  • PI/PD/DFT Education & Training Support
  • Design Kickoff / Signoff Support
  • Enhanced New Tech Search & Study

PS Team

  • Supports PI business operations and provides solutions
  • Assists in PD work and offers solutions
  • Auto scripts setup and guidance for staff to use them well
  • Offers other technical support as needed

DFT Team

  • Logic Test
    - SCAN Design & ATPG 

    - Logic BIST (Scheduled for Q4 2024) 
    - In-system Test (Scheduled for Q1 2025)
  • Memory BIST
    - iSTART BIST/BIRA 

    - Tessent BIST/BIRA (Scheduled for Q3 to Q4 2024)
  • Test
    - IP Integration Test : IJTAG (Scheduled for Q3 2024) 

    - Vector / Test support

Design to Production Solution Dept.


Program Management Team


  • TSMC technical support
    - Support DK(Physical Design Kit) management 

    - Support customer’s technical requirement 
    - Support customers’ tape-out
  • Project management
    - Project development schedule managing 

    - Project development issue support
  • Foundry management
    - Managing foundry process issue 

    - Test yield analysis & improvement 
    - Analyze WAT(PCM) performance 
    - Analyze device/process window with skew

QRA Team

  • ISO and audit response
  • Development process and mass production quality control
  • Reliability testing and failure analysis
  • Mass production quality customer response

Package Team

  • Package & substrate Technical service
    - Optimize package types & package size 

    - Package & Substrate technical support
  • Package Design service
    - Package design, POD review & Optimization

    - Impedance & skew check for high-speed signals
  • Package Assembly solution
    - Pre-review of process risk for package design

    - Assembly process & condition DOE
  • PI/SI simulation service
    - Analyze IR Drop, S-parameter, Eye diagram result 

    - RLC, SI, PI Extraction

Test Team

  • Mass production test solution development
  • Product production characterization
  • Test production control and yield improvement





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FAX       +82 031-212-1985

E-MAIL  asicland@asicland.com

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Copyright ⓒ ASICLAND Co., Ltd. All rights reserved.

Copyright ⓒ ASICLAND Co., Ltd. All rights reserved.


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