Find Your Team
Introducing the roles and teams that power ASICLAND
Find Your Team
Introducing the roles and teams that power ASICLAND
ASICLAND with Creative Talent ASICLAND considers talent as the best corporate value and provides opportunities for people to grow into the best talent. We are recruiting excellent talent who can grow with ASICLAND. Apply now. |
ASICLAND with Creative Talent
ASICLAND considers talent as the best corporate value and provides opportunities for people to grow into the best talent.
We are recruiting excellent talent who can grow with ASICLAND. Apply now.
Job Introduction |
Management Planning Dept. | CX Team | • Establishment and management of corporate CI, BI, PI identity • Strengthening university/internal relationships and conducting promotional marketing • Development of IR strategy / management of shareholder/investor relationships and corporate information dissemination • Provision of corporate training services and learning support • Defining organizational values and behavior patterns, and establishing corporate culture | ||
Strategic Planning Team | • Establishing business plans and mid-to-long-term management strategies • Managing funds and budgets • Corporate disclosure and board of directors operations • Reviewing new business opportunities | |||
Financial Management Team | • Managing performance indicators (sales/profit and loss) • Corporate settlement and external audit inspection • Tax management including corporate tax and value-added tax (VAT) | |||
HR Infra Operations Team | • HR operations & administrative support • Administration of employee welfare programs • Human resources planning, evaluation, compensation, recruitment, and training • Management of office environment and general administrative tasks • Management of enterprise systems in addition to server computing | |||
Research Planning Team | • Planning and managing government-funded R&D projects and national research initiatives • Analyzing research outcomes supported by the government and managing performance indicators • Operating and overseeing inter-ministerial research management systems • Reviewing new project announcements and planning new research initiatives • Collecting, researching, and analyzing data on the latest technologies | |||
Purchasing Team | •Management of outsourcing, production, delivery schedules, inventory, and import/export customs for TSMC and OSAT • Sourcing and negotiating prices with outsourcing partners • Managing development and mass production schedules • Product cost estimation • Purchasing and sales management | |||
Sales Dept. | Sales 1 Team | • ASIC, SoC, Turnkey, IP sales | ||
Sales 2 Team | • ASIC, SoC, Turnkey, IP sales | |||
IP Team | • Planning for the purchase of semiconductor design assets (IP) and semiconductor design automation tools (EDA) | |||
Global Strategy Dept. | Global Business Team | • Analysis of global semiconductor technology trends | ||
SoC Dept. | PM Team | • Task Management - Establishing task objectives (specification & guide) - Estimating and managing task schedules - Issue management • System Operations - Managing DevOps (development environment) - Managing Confluence for task information sharing - Managing JIRA for issue tracking - Managing Slack for task progress sharing and collaboration | ||
SD Team | • System design - Chip Top Design (including SMU, CMU, PMU) - CPU Subsystem Design - SD(Secure Digital)/eMMC(embedded MultiMedial Card I/F) System Integration - Off chip Memory Design (DDR/LPDDR/GDDR/HBM etc) - Bus Making & Bus Integration • Inhouse tools Development - AWorld Magic™ | |||
HSI Team | • High Speed Interface design | |||
SW Team | • BOOT ROM Development - Secure ROM code deveolopment (CC312 based) - FPGA-Based ROM Code test - RTL Sim & Posrt Sim • Board Support Package (BSP) Development - U-Boot driver porting & development - Linux driver porting & development • A Linux-based chip sorting test app | |||
DV Team | • Design Verification - UVM based IP verification - UVM based application performance verification - UVM based rtl/pre/post env verification | |||
HW Team | • Package Ball Mapping • Hardware Board Design and Manufacturing - FPGA-Based Verification Board - Chip Sorting Board - Evaluation Board | |||
DI 1 Dept. | PI 1 Team | • Provide design service to connect customers (fabeless company) and foundry (TSMC) | ||
PI 2 Team | • Provide design service to connect customers (fabeless company) and foundry (TSMC) | |||
SKH Team | • Providing design services that connect customers (fabless companies) with foundries (TSMC) • Offering customized design services tailored to customer requirements - Optimization for the best PPA (Power, Performance, and Area) • Providing physical implementation and physical design services • Custom layouts for mixed IP - P&R, DRC, LVS, antenna, latch-up, ESD, and EM rule checks - SoC Mixed-IP DK layout and verification | |||
DI 2 Dept. | PD 1 Team | • Provide design service to connect customers (fabeless company) and foundry (TSMC) - Pursue optimization for the best PPA - Use EDA tools such as Synopsys, Cadence and Mentor, etc - Physical Design Implementation - Physical Design Verification - DRC/LVS/ESD/DFM - EMIR, DVD | ||
PD 2 Team | • Provide design service to connect customers (fabeless company) and foundry (TSMC) - Pursue optimization for the best PPA - Use EDA tools such as Synopsys, Cadence and Mentor, etc - Physical Design Implementation - Physical Design Verification - DRC/LVS/ESD/DFM - EMIR, DVD | |||
DS Team | • Provide design service to connect customers (fabeless company) and foundry (TSMC) • Provides design service to meet customer needs - Pursue optimization for the best PPA • Provides Physical Implementation & Physical Design service • Custom Layout for Mixed IP - P&R, DRC, LVS, Antenna, Latch-up, ESD, EM rule check | |||
DI 3 Dept. | ETS Team | • Process DK/PDK/IP Support & Management | ||
PS Team | • Supports PI business operations and provides solutions | |||
DFT Team | • Logic Test - SCAN Design & ATPG - Logic BIST (Scheduled for Q4 2024) - In-system Test (Scheduled for Q1 2025) • Memory BIST - iSTART BIST/BIRA - Tessent BIST/BIRA (Scheduled for Q3 to Q4 2024) Test - IP Integration Test : IJTAG (Scheduled for Q3 2024) - Vector / Test support | |||
Design to Production Solution Dept. | Program Management Team | • TSMC technical support - Support DK(Physical Design Kit) management - Support customer’s technical requirement - Support customers’ tape-out - Project development schedule managing - Project development issue support - Managing foundry process issue - Test yield analysis & improvement - Analyze WAT(PCM) performance - Analyze device/process window with skew | ||
QRA Team | • ISO and audit response | |||
Package Team | • Package & substrate Technical service - Optimize package types & package size - Package & Substrate technical support - Package design, POD review & Optimization - Impedance & skew check for high-speed signals - Pre-review of process risk for package design - Assembly process & condition DOE - Analyze IR Drop, S-parameter, Eye diagram result - RLC, SI, PI Extraction | |||
Test Team | • Mass production test solution development |
Recruitment Information |
Recruitment Procedure |
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How to apply |
※ If any false information is found in the submitted documents, the offer may be withdrawn even after the hiring decision has been made.
Recruitment Information |
Recruitment Procedure |
![]() Application submission (online, e-mail) |
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How to apply |
※ If any false information is found in the submitted documents, the offer may be withdrawn even after the hiring decision has been made.
Cooperation, |
ASICLAND envisions a future where |
Cooperation,
Win-win
ASICLAND envisions a future where we thrive together through
mutual growth and sharing of achievements.
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TEL +82 031-212-1984 FAX +82 031-212-1985 E-MAIL asicland@asicland.com | ||||||
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Copyright ⓒ ASICLAND Co., Ltd. All rights reserved. |
COMPANY | BUSINESS | PRESS | IR | CAREERS | ||
TEL +82 031-212-1984 FAX +82 031-212-1985 E-MAIL asicland@asicland.com | ANNOUNCEMENT | |||||
Copyright ⓒ ASICLAND Co., Ltd. All rights reserved. |
[A] Yes, graduates who are expected to graduate can also apply. Please submit your graduation certificate after being hired.
[A] Yes, it is possible to reapply.
[A] Only successful applicants will be contacted individually.
[A] Only those who pass the first interview will receive an individual aptitude test email.
[A] There is no set dress code. You can wear whatever clothes you like.